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FPGA implementation of floating-point complex matrix inversion based on GAUSS-JORDAN elimination

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dc.contributor.author Moussa, Sherif
dc.contributor.author Razik, Ahmed M. Abdel
dc.contributor.author Dahmane, Adel Omar
dc.contributor.author Hamam, Habib
dc.date.accessioned 2020-01-30T05:23:21Z
dc.date.available 2020-01-30T05:23:21Z
dc.date.copyright 2013 en_US
dc.date.issued 2013
dc.identifier.citation Moussa, S., Abdel Razik, A. M., Dahmane, A. O., & Hamam, H. (2013). FPGA implementation of floating-point complex matrix inversion based on GAUSS-JORDAN elimination. In Canadian Conference on Electrical and Computer Engineering. https://doi.org/10.1109/CCECE.2013.6567785 en_US
dc.identifier.isbn 9781479900329
dc.identifier.issn 08407789
dc.identifier.uri http://dx.doi.org/10.1109/CCECE.2013.6567785
dc.identifier.uri http://hdl.handle.net/20.500.12519/77
dc.description This conference paper is not available at CUD collection. The version of scholarly record of this conference paper is published in 2013 26th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) (2013), available online at: https://doi.org/10.1109/CCECE.2013.6567785. en_US
dc.description.abstract This work presents the architecture of an optimized complex matrix inversion using GAUSS-JORDAN elimination (GJ-elimination) on FPGA with single precision floating-point representation to be used in MIMO-OFDM receiver. This module consists of single precision floating point arithmetic components and control unit which perform the GJ-elimination algorithm. The proposed architecture performs the GJ-elimination for complex matrix element by element. Only critical arithmetic operations are calculated to get the needed values without performing all the arithmetic operations of the GJ-elimination algorithm. This results in a reduced hardware resources and execution time. © 2013 IEEE. en_US
dc.language.iso en en_US
dc.relation Authors Affiliations: Moussa, S., Elec. and Comp. Eng. Department, Université du Québec À Trois-Riviéres, Trois-Rivières, Canada, School of Engineering, Canadian University of Dubai, Dubai, United Arab Emirates; Abdel Razik, A.M., School of Eng., Arab Academy for Science, Technology and Maritime Transport, Cairo, Egypt; Dahmane, A.O., Elec. and Comp. Eng. Department, Université du Québec À Trois-Riviéres, Trois-Rivières, Canada; Hamam, H., Faculty of Engineering, University of Moncton, Moncton, Canada
dc.relation.ispartofseries Canadian Conference on Electrical and Computer Engineering;
dc.rights Permission to reuse abstract has been secured from Institute of Electrical and Electronics Engineers Inc.
dc.rights.uri https://www.ieee.org/publications/rights/rights-policies.html
dc.subject Matrix inversion en_US
dc.subject MIMO en_US
dc.subject OFDM en_US
dc.subject Arithmetic operations en_US
dc.subject Complex matrices en_US
dc.subject FPGA implementations en_US
dc.subject Gauss-Jordan elimination en_US
dc.subject Hardware resources en_US
dc.subject Proposed architectures en_US
dc.subject Single precision en_US
dc.subject Digital arithmetic en_US
dc.subject Field programmable gate arrays (FPGA) en_US
dc.subject Orthogonal frequency division multiplexing en_US
dc.subject Computer architecture en_US
dc.title FPGA implementation of floating-point complex matrix inversion based on GAUSS-JORDAN elimination en_US
dc.type Conference Paper en_US
dc.rights.holder Copyright : 2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.


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